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 NC7SBU3157, FSAU3157 -- Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
April 2008
NC7SBU3157, FSAU3157 Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
Features
Analog and digital applications Space-saving, SC70 6-lead, surface-mount package Low on resistance: <10 on typical at 3.3V VCC Broad VCC operating range: 1.65V to 5.5V Rail-to-rail signal handling Power-down, high-impedance control input Over-voltage tolerance of control input to 7.0V Break-before-make enable circuitry 250 MHz, 3dB bandwidth
General Description
The NC7SBU3157 / FSAU3157 is a high-performance, single-pole / double-throw (SPDT) analog switch or 2:1 multiplexer / de-multiplexer bus switch. The device is fabricated with advanced sub-micron CMOS technology to achieve high-speed enable and disable times and low on resistance. The break-beforemake select circuitry prevents disruption of signals on the B port due to both switches temporarily being enabled during select pin switching. The device is specified to operate over the 1.65 to 5.5V VCC operating range. The control input tolerates voltages up to 5.5V, independent of the VCC operating range. Fairchild's integrated Undershoot Hardened Circuit (UHC(R)) senses undershoot at the I/Os, and responds by preventing voltage differentials from developing and turning the switch on.
Ordering Information
Top Mark
B7A B7A
Part Number
NC7SBU3157P6X FSAU3157P6X
Operating Temperature Range
-40 to +85C -40 to +85C
Package Description
6-Lead, SC70, EIAJ SC88, 1.25mm Wide Package 6-Lead, SC70, EIAJ SC88, 1.25mm Wide Package
Packing Method
3000 Units Tape and Reel 3000 Units Tape and Reel
All packages are lead free per JEDEC: J-STD-020B standard. MicroPakTM is a trademark of Fairchild Semiconductor Corporation. UHC(R) is a registered trademark of Fairchild Semiconductor Corporation.
(c)2005 Fairchild Semiconductor Corporation NC7SBU3157, FSAU3157 Rev. 1.0.4
www.fairchildsemi.com
NC7SBU3157, FSAU3157 -- Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
Logic Symbol
B1 S B0 A
Connection Diagrams
Figure 1. Logic Symbol
2. Pin Assignments SC70
Analog Symbol
B1 GND S VCC A
B0
Figure 3. Analog Symbol
Figure 4. Pin One Orientation Note: Orientation of top mark determines pin one location. Read the top mark left to right and pin one is the lower left pin (see Figure 4).
Function Table
Input (S)
Logic Level Low Logic Level High
Function
B0 Connected to A B1 Connected to A
Pin Descriptions
Pin Names
A, B0, B1 S
Description
Data Ports Control Input
(c) 2005 Fairchild Semiconductor Corporation NC7SBU3157, FSAU3157 Rev. 1.0.4 2
www.fairchildsemi.com
NC7SBU3157, FSAU3157 -- Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only
Symbol
VCC VS VIN IIK IOUT ICC/IGND TSTG TJ TL PD Note: Supply Voltage DC Switch Voltage(1) DC Input Voltage
(1)
Parameter
Min.
-0.5 -0.5 -0.5
Max.
+7.0 VCC +0.5 +7.0 -50 128 100
Units
V V V mA mA mA C C C mW
DC Input Diode Current at VIN < 0V DC Output Current DC VCC or Ground Current Storage Temperature Range Junction Temperature Under Bias Junction Lead Temperature (Soldering, 10 seconds) Power Dissipation at +85C -65
+150 +150 +260 180
1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Symbol
VCC VIN VIN VOUT TA tr, tf JA Supply Voltage Operating Control Input Switch Input Output Voltage(2) Voltage(2)
Parameter
Min.
1.65 0 0 0 -40
Max
5.50 VCC VCC VCC +85 10 5 350
Units
V V V V C ns/V ns/V C/W
Voltage(2) Control Input VCC=2.3V-3.6V Control Input VCC=4.5V-5.5V
Operating Temperature Input Rise and Fall Time Thermal Resistance
0 0
Note: 2. Control input must be held HIGH or LOW; it must not float.
(c) 2005 Fairchild Semiconductor Corporation NC7SBU3157, FSAU3157 Rev. 1.0.4 3
www.fairchildsemi.com
NC7SBU3157, FSAU3157 -- Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
DC Electrical Characteristics
Symbol Parameter
High Level Input Voltage Low Level Input Voltage Input Leakage Current 0 VIN 5.5V
Conditions
VCC (V)
TA = +25C Min. Typ. Max.
TA = -40C to +85C Min.
0.75 VCC 0.7 VCC
Units
Max.
V 0.25 VCC 0.3 VCC 1 1 15.0 15.0 15.0 20.0 20.0 30.0 30.0 50.0 50.0 V A A
VIH VIL IIN IOFF
1.65 to 1.95 0.75 VCC 2.3 to 5.5 1.65 to 1.95 2.3 to 5.5 0 to 5.5 1.65 to 5.5 4.5 0.05 0.05 3.0 5.0 7.0 3.0 2.3 1.65 4.0 10.0 5.0 13.0 6.5 17.0 0.7 VCC 0.25 VCC 0.3 VCC 0.1 0.1 15.0 15.0 15.0 20.0 20.0 30.0 30.0 50.0 50.0
Off State Leakage 0 A, B VCC Current VIN=0V, IO=30mA VIN=2.4V, IO=-30mA VIN=4.5V, IO=-30mA VIN=0V, IO=24mA VIN=3V, IO=-24mA VIN=0V, IO=8mA VIN=2.3V, IO=-8mA VIN=0V, IO=4mA VIN=1.65V, IO=-4mA Quiescent Supply Current; V =V or GND IOUT=0 All Channels On or IN CC Off Analog Signal Range IA=-30mA, 0 VBn VCC On Resistance IA=-24mA, 0 VBn VCC Over Signal Range (3, 7) IA=-8mA, 0 VBn VCC IA=-4mA, 0 VBn VCC IA=-30mA, VBn=3.15 On Resistance Match BetweenChannels(3, 4, 5) Voltage Undershoot IA=-24mA, VBn 2.1 IA=-8mA, VBn=1.6 IA=-4mA, VBn=1.15
RON
Switch On Resistance(3)
ICC
5.5
1
10
A
VCC 4.5 3.0 2.3 1.65 4.5 3.0 2.3 1.65 5.5 5.0 3.3 2.5 1.8
0
VCC
0
VCC 25.0 50.0 100 300
V
RRANGE
0.15 0.2 0.5 0.5 -2 6.0 12.0 28.0 125 V
RON
VIKU
0.0mA IIN -50, OE 5.5v IA=-30mA, 0 VBn VCC
Rflat
On Resistance Flatness(3, 4, 6)
IA=-24mA, 0 VBn VCC IA=-8mA, 0 VBn VCC IA=-4mA, 0 VBn VCC
Notes: 3. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B Ports). 4. Parameter is characterized, but not tested in production. 5. RON = RON max - RON minimum measured at identical VCC, temperature, and voltage levels. 6. Flatness is defined as the difference between the maximum and minimum value of on resistance over the specified range of conditions. 7. Guaranteed by design.
(c) 2005 Fairchild Semiconductor Corporation NC7SBU3157, FSAU3157 Rev. 1.0.4 4 www.fairchildsemi.com
NC7SBU3157, FSAU3157 -- Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
AC Electrical Characteristics
Symbol Parameter Conditions VCC (V)
1.65 to 1.95 tPHL, tPLH Propagation Delay Bus-to-Bus(8) VI = OPEN 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 1.65 to 1.95 tPZL, tPZH Output Enable Time Turn-On Time (A to Bn) VI = 2 x VCC for tPZL VI = 0V for tPZH 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 1.65 to 1.95 tPLZ, tPHZ Output Disable Time Turn-Off Time (A Port to B Port) VI = 2 x VCC for tPLZ VI = 0V for tPHZ 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 1.65 to 1.95 tBBM Break-Before-Make Time(9) 2.3 to 2.7 3.0 to 3.6 4.5 to 5.5 Q OIRR Xtalk BW THD Charge Injection(9) Off Isolation(10) Crosstalk -3dB Bandwidth Total Harmonic Distortion(9) CL = 0.1nF, VGEN = 0V, RGEN = 0 RL = 50, f = 10MHz RL = 50, f = 10MHz RL = 50 RL = 600, 0.5VPP, f = 20Hz to 20KHz 5.0 3.3 1.65 to 5.5 1.65 to 5.5 1.65 to 5.5 5.0 7.0 3.5 2.5 1.7 3.0 2.0 1.5 0.8 0.5 0.5 0.5 0.5 7.0 3.0 -57.0 -54.0 250 .011 1.2 0.8 0.3 23.0 13.0 6.9 5.2 12.5 7.0 5.0 3.5 7.0 3.5 2.5 1.7 3.0 2.0 1.5 0.8 0.5 0.5 0.5 0.5 pC dB dB Figure 10 Figure 11 Figure 12 ns Figure 9 1.2 0.8 0.3 24.0 14.0 7.6 5.7 13.0 7.5 5.3 3.8 ns Figure 7 Figure 8 ns Figure 7 Figure 8 ns Figure 7 Figure 8
TA = -40C to +85C Units Figure Min. Typ. Max. Min. Max. TA = +25C
MHz Figure 15 %
Notes: 8. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the on resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance). 9. Guaranteed by design. 10. Off Isolation = 20 log10 [VA / VBn].
Capacitance
TA = +25C, f = 1MHz. Capacitance is characterized, but not tested in production. Symbol
CIN CIO-B CIOA-ON
Parameter
Control Pin Input Capacitance B Port Off Capacitance A Port Capacitance When Switch Is Enabled
Conditions
VCC = 0V VCC = 5.0V VCC = 5.0V
Typ.
2.3 6.5 18.5
Max.
Units
pF pF pF
Figure
Figure 13 Figure 14
(c) 2005 Fairchild Semiconductor Corporation NC7SBU3157, FSAU3157 Rev. 1.0.4 5
www.fairchildsemi.com
NC7SBU3157, FSAU3157 -- Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
Undershoot Characteristic
Symbol
VOUTU
Parameter
Output Voltage During Undershoot
Min.
2.5
Typ.
VOH - 0.3
Units
V
Figure
Figure 5
Note: 11. This test is intended to characterize the device's protective capabilities by maintaining output signal integrity during an input transient voltage undershoot event.
Figure 5. Output Voltage During Undershoot
Device Test Conditions
Parameter
VIN R1 = R2 VTRI VCC
Value
see Figure 6 100 7.0 5.5
Units
V K V V
Transient Input Voltage (VIN) Waveform
Figure 6. Transient Input Voltage Waveform
(c) 2005 Fairchild Semiconductor Corporation NC7SBU3157, FSAU3157 Rev. 1.0.4 6
www.fairchildsemi.com
NC7SBU3157, FSAU3157 -- Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
AC Loading and Waveforms
Notes: Input driven by 50 source terminated in 50. CL includes load and stray capacitance. Input PRR=1.0MHz; tw = 500ns. Figure 7. AC Test Circuit
tr = 2.5ns
90% 90% 50%
tr = 2.5ns VCC
tr = 2.5ns
90% 90% 50%
tr = 2.5ns VCC
Control Input
10%
50%
10%
Switch Input
10%
GND tPLZ VTRI
50%
tPZL
10%
tW tPLH tPHL
GND Output VOH
50%
VOL+0.3V VOL tPHZ VOH
Output
50%
50%
tPZH VOL Output
50%
VOH-0.3V VTRI
Figure 8. AC Waveforms
Figure 9. Break-Before-Make Interval Timing
(c) 2005 Fairchild Semiconductor Corporation NC7SBU3157, FSAU3157 Rev. 1.0.4 7
www.fairchildsemi.com
NC7SBU3157, FSAU3157 -- Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
AC Loading and Waveforms (continued)
RGEN VGE
BN S
A
VOUT RL 1M CL 100pF
Logic Input VOUT
OFF
ON
OFF VOUT
Logic Input
Q = (VOUT)(CL)
Figure 10. Charge Injection Test
10nF
10nF Signal Generator 0dBm
50
A
VCC S Logic Input 0V or VIH
B0 VCC B1 S GND 50
A 50
Analyzer 50
BN GND
Analyzer
Figure 11. Off Isolation
Figure 12. Crosstalk
10nF Capacitance Meter f = 1MHz
10nF
A Capacitance Meter f = 1MHz BN
VCC S GND Logic Input 0V or VCC
A
VCC S Logic Input 0V or VCC
BN GND
Figure 13. Channel Off Capacitance
Figure 14. Channel On Capacitance
10nF
Signal Generator 0dBm Logic Input 0V or VCC
BN S
VCC
A 50
GND
Figure 15. Bandwidth
(c) 2005 Fairchild Semiconductor Corporation NC7SBU3157, FSAU3157 Rev. 1.0.4 8
www.fairchildsemi.com
NC7SBU3157, FSAU3157 -- Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
Physical Dimensions
Figure 16. 6-Lead, SC70, EIAJ SC88, 1.25mm Wide Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ For SC70 Tape and Reel Specifications, please visit: http://www.fairchildsemi.com/products/analog/pdf/sc70-6_tr.pdf
(c) 2005 Fairchild Semiconductor Corporation NC7SBU3157, FSAU3157 Rev. 1.0.4 9
www.fairchildsemi.com
NC7SBU3157, FSAU3157 -- Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch
www.fairchildsemi.com
(c) 2005 Fairchild Semiconductor Corporation
NC7SBU3157, FSAU3157 Rev. 1.0.4
10


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